Publications

Selected Publications

(Updated on October 28th, 2021, from dblp)

  • 2013

    [j]  Leibo Liu, Wen Jia, Shouyi Yin, Dong Wang, Guanyi Sun, Eugene Tang, Shaojun Wei: ReSSIM: a mixed-level simulator for dynamic coarse-grained reconfigurable processor. SCIENCE CHINA Information Sciences 56(6): 1-16 (2013)
    [j]  Weilong Zhang, Leibo Liu, Shouyi Yin, Renyan Zhou, Shanshan Cai, Shaojun Wei: An efficient VLSI architecture of speeded-up robust feature extraction for high resolution and high frame rate video. SCIENCE CHINA Information Sciences 56(7): 1-14 (2013)
    [j]  Yansheng Wang, Leibo Liu, Shouyi Yin, Min Zhu, Peng Cao, Jun Yang, Shaojun Wei: Hierarchical representation of on-chip context to reduce reconfiguration time and implementation area for coarse-grained reconfigurable architecture. SCIENCE CHINA Information Sciences 56(11): 1-20 (2013)
    [j]  Jienan Zhang, Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei: Concurrent Detection and Recognition of Individual Object Based on Colour and p-SIFT Features. IEICE Transactions 96-A(6): 1357-1365 (2013)
    [j]  Peng Ouyang, Shouyi Yin, Hui Gao, Leibo Liu, Shaojun Wei: Parallelization of Computing-Intensive Tasks of SIFT Algorithm on a Reconfigurable Architecture System. IEICE Transactions 96-A(6): 1393-1402 (2013)
    [j]  Shouyi Yin, Dajiang Liu, Leibo Liu, Shaojun Wei: Affine Transformations for Communication and Reconfiguration Optimization of Mapping Loop Nests on CGRAs. IEICE Transactions 96-D(8): 1582-1591 (2013)
    [j]  Yansheng Wang, Leibo Liu, Shouyi Yin, Min Zhu, Peng Cao, Jun Yang, Shaojun Wei: The Organization of On-Chip Data Memory in One Coarse-Grained Reconfigurable Architecture. IEICE Transactions 96-A(11): 2218-2229 (2013)
    [j]  Shouyi Yin, Rui Shi, Leibo Liu, Shaojun Wei: Battery-Aware Task Mapping for Coarse-Grained Reconfigurable Architecture. IEICE Transactions 96-D(12): 2524-2535 (2013)
    [j]  Zhen Zhang, Shouyi Yin, Leibo Liu, Shaojun Wei: An Inductive-Coupling Interconnected Application-Specific 3D NoC Design. IEICE Transactions 96-A(12): 2633-2644 (2013)
    [j]  Shouyi Yin, Jianwei Cui, Leibo Liu, Shaojun Wei: Calibration Techniques for Low-Power Wireless Multiband Transceiver. IJDSN 9 (2013)
    [j]  Yu Ren, Leibo Liu, Shouyi Yin, Jie Han, Qinghua Wu, Shaojun Wei: A fault tolerant NoC architecture using quad-spare mesh topology and dynamic reconfiguration. Journal of Systems Architecture - Embedded Systems Design 59(7): 482-491 (2013)
    [j]  Wei Xia, Shouyi Yin, Peng Ouyang: A High Precision Feature Based on LBP and Gabor Theory for Face Recognition. Sensors 13(4): 4499-4513 (2013)
    [j]  Jianfeng Zhu, Leibo Liu, Shouyi Yin, Shaojun Wei: Low-Power Reconfigurable Processor Utilizing Variable Dual VDD. IEEE Trans. on Circuits and Systems 60-II(4): 217-221 (2013)
    [c]  Leibo Liu, Chenchen Deng, Dong Wang, Min Zhu, Shouyi Yin, Peng Cao, Shaojun Wei: An energy-efficient coarse-grained dynamically reconfigurable fabric for multiple-standard video decoding applications. CICC 2013: 1-4
    [c]  Leibo Liu, Weilong Zhang, Chenchen Deng, Shouyi Yin, Shanshan Cai, Shaojun Wei: SURFEX: A 57fps 1080P resolution 220mW silicon implementation for simplified speeded-up robust feature with 65nm process. CICC 2013: 1-4
    [c]  Dajiang Liu, Shouyi Yin, Leibo Liu, Shaojun Wei: Polyhedral model based mapping optimization of loop nests for CGRAs. DAC 2013: 19:1-19:8
    [c]  Guoyong Li, Leibo Liu, Shouyi Yin, Changkui Mao, Shaojun Wei: Mapping IDCT of MPEG2 on Coarse-Grained Reconfigurable Array for Matching 1080p Video Decoding. EMC/HumanCom 2013: 545-555
    [c]  Zhen Zhang, Shouyi Yin, Leibo Liu, Shaojun Wei: An inductive-coupling interconnected application-specific 3D NoC design. ISCAS 2013: 550-553
    [c]  Leibo Liu, Yingjie Victor Chen, Shouyi Yin, Dong Wang, Xing Wang, Shaojun Wei, Li Zhou, Hao Lei, Peng Cao: Implementation of multi-standard video decoding algorithms on a coarse-grained reconfigurable multimedia processor. ISCAS 2013: 897-900
    [c]  Yu Ren, Leibo Liu, Shouyi Yin, Qinghua Wu, Shaojun Wei, Jie Han: A VLSI architecture for enhancing the fault tolerance of NoC using quad-spare mesh topology and dynamic reconfiguration. ISCAS 2013: 1793-1796
    [c]  Dajiang Liu, Shouyi Yin, Leibo Liu, Shaojun Wei: Affine transformations for communication and reconfiguration optimization of loops on CGRAs. ISCAS 2013: 2541-2544
    [c]  Qinghua Wu, Leibo Liu, Shouyi Yin, Yu Ren, Shaojun Wei: SPC: An Approach to Guarantee Performance in Cost Oriented Mapping Algorithm for NoC Architectures. NAS 2013: 187-190
    [c]  Yulin Li, Shouyi Yin, Leibo Liu, Shaojun Wei, Dong Wang: Battery-Aware MAC Analytical Modeling for Extending Lifetime of Low Duty-Cycled Wireless Sensor Network. NAS 2013: 297-301

  • 2012

    [j]  Shouyi Yin, Chongyong Yin, Leibo Liu, Min Zhu, Shaojun Wei: Configuration Context Reduction for Coarse-Grained Reconfigurable Architecture. IEICE Transactions 95-D(2): 335-344 (2012)
    [j]  Shouyi Yin, Yang Hu, Zhen Zhang, Leibo Liu, Shaojun Wei: Hybrid Wired/Wireless On-Chip Network Design for Application-Specific SoC. IEICE Transactions 95-C(4): 495-505 (2012)
    [j]  Peng Ouyang, Shouyi Yin, Leibo Liu, Shaojun Wei: Multi-Battery Scheduling for Battery-Powered DVS Systems. IEICE Transactions 95-B(7): 2278-2285 (2012)
    [j]  Dajiang Liu, Shouyi Yin, Chongyong Yin, Leibo Liu, Shaojun Wei: Mapping Optimization of Affine Loop Nests for Reconfigurable Computing Architecture. IEICE Transactions 95-D(12): 2898-2907 (2012)
    [c]  Shouyi Yin, Chongyong Yin, Leibo Liu, Min Zhu, Yansheng Wang, Shaojun Wei: Reducing configuration contexts for coarse-grained reconfigurable architecture. ISCAS 2012: 121-124