Publications

Selected Publications

(Updated on October 28th, 2021, from dblp)

  • 2015

    [j]   Chen Wu, Chenchen Deng, Leibo Liu, Shouyi Yin, Jie Han, Shaojun Wei: Reliability-aware mapping for various NoC topologies and routing algorithms under performance constraints. SCIENCE CHINA Information Sciences 58(8): 1-14 (2015)
    [j]   Yu Peng, Shouyi Yin, Leibo Liu, Shaojun Wei: Battery-Aware Loop Nests Mapping for CGRAs. IEICE Transactions 98-D(2): 230-242 (2015)
    [j]   Bing Xu, Shouyi Yin, Leibo Liu, Shaojun Wei: Low-Power Loop Parallelization onto CGRA Utilizing Variable Dual VDD. IEICE Transactions 98-D(2): 243-251 (2015)
    [j]   Rui Shi, Shouyi Yin, Leibo Liu, Qiongbing Liu, Shuang Liang, Shaojun Wei: The Implementation of Texture-Based Video Up-Scaling on Coarse-Grained Reconfigurable Architecture. IEICE Transactions 98-D(2): 276-287 (2015)
    [j]   Dajiang Liu, Shouyi Yin, Leibo Liu, Shaojun Wei: Mapping Multi-Level Loop Nests onto CGRAs Using Polyhedral Optimizations. IEICE Transactions 98-A(7): 1419-1430 (2015)
    [j]   Chen Yang, Leibo Liu, Yansheng Wang, Shouyi Yin, Peng Cao, Shaojun Wei: Configuration Approaches to Enhance Computing Efficiency of Coarse-Grained Reconfigurable Array. Journal of Circuits, Systems, and Computers 24(3) (2015)
    [j]   Shouyi Yin, Peng Ouyang, Leibo Liu, Yike Guo, Shaojun Wei: Fast Traffic Sign Recognition with a Rotation Invariant Binary Pattern Based Feature. Sensors 15(1): 2161-2180 (2015)
    [j]   Shouyi Yin, Hao Dong, Guangli Jiang, Leibo Liu, Shaojun Wei: A Novel 2D-to-3D Video Conversion Method Using Time-Coherent Depth Maps. Sensors 15(7): 15246-15264 (2015)
    [j]   Weizhi Xu, Shouyi Yin, Leibo Liu, Zhiyong Liu, Shaojun Wei: High-Performance Motion Estimation for Image Sensors with Video Compression. Sensors 15(8): 20752-20778 (2015)
    [j]   Guangli Jiang, Leibo Liu, Wenping Zhu, Shouyi Yin, Shaojun Wei: A 181 GOPS AKAZE Accelerator Employing Discrete-Time Cellular Neural Networks for Real-Time Feature Extraction. Sensors 15(9): 22509-22529 (2015)
    [j]   Chen Wu, Chenchen Deng, Leibo Liu, Jie Han, Jiqiang Chen, Shouyi Yin, Shaojun Wei: An Efficient Application Mapping Approach for the Co-Optimization of Reliability, Energy, and Performance in Reconfigurable NoC Architectures. IEEE Trans. on CAD of Integrated Circuits and Systems 34(8): 1264-1277 (2015)
    [j]   Peng Ouyang, Shouyi Yin, Yuchi Zhang, Leibo Liu, Shaojun Wei: A Fast Integral Image Computing Hardware Architecture With High Power and Area Efficiency. IEEE Trans. on Circuits and Systems 62-II(1): 75-79 (2015)
    [j]   Zhen Zhang, Shouyi Yin, Leibo Liu, Shaojun Wei: A real-time time-consistent 2D-to-3D video conversion system using color histogram. IEEE Trans. Consumer Electronics 61(4): 524-530 (2015)
    [j]   Leibo Liu, Dong Wang, Min Zhu, Yansheng Wang, Shouyi Yin, Peng Cao, Jun Yang, Shaojun Wei: An Energy-Efficient Coarse-Grained Reconfigurable Processing Unit for Multiple-Standard Video Decoding. IEEE Trans. Multimedia 17(10): 1706-1720 (2015)
    [j]   Leibo Liu, Dong Wang, Min Zhu, Yansheng Wang, Shouyi Yin, Peng Cao, Jun Yang, Shaojun Wei: Correction to "An Energy-Efficient Coarse-Grained Reconfigurable Processing Unit for Multiple-Standard Video Decoding". IEEE Trans. Multimedia 17(12): 2354-2355 (2015)
    [j]   Yu Ren, Leibo Liu, Shouyi Yin, Jie Han, Shaojun Wei: Efficient Fault-Tolerant Topology Reconfiguration Using a Maximum Flow Algorithm. TRETS 8(3): 19:1-19:24 (2015)
    [j]   Jianfeng Zhu, Leibo Liu, Shouyi Yin, Xiao Yang, Shaojun Wei: A Hybrid Reconfigurable Architecture and Design Methods Aiming at Control-Intensive Kernels. IEEE Trans. VLSI Syst. 23(9): 1700-1709 (2015)
    [j]   Leibo Liu, Chen Wu, Chenchen Deng, Shouyi Yin, Qinghua Wu, Jie Han, Shaojun Wei: A Flexible Energy- and Reliability-Aware Application Mapping for NoC-Based Reconfigurable Architectures. IEEE Trans. VLSI Syst. 23(11): 2566-2580 (2015)
    [j]   Dajiang Liu, Shouyi Yin, Yu Peng, Leibo Liu, Shaojun Wei: Optimizing Spatial Mapping of Nested Loop for Coarse-Grained Reconfigurable Architectures. IEEE Trans. VLSI Syst. 23(11): 2581-2594 (2015)
    [j]   Peng Ouyang, Shouyi Yin, Leibo Liu, Shaojun Wei: Energy Management on Battery-Powered Coarse-Grained Reconfigurable Platforms. IEEE Trans. VLSI Syst. 23(12): 3085-3098 (2015)
    [c]  Leibo Liu, Yu Ren, Chenchen Deng, Shouyi Yin, Shaojun Wei, Jie Han: A novel approach using a minimum cost maximum flow algorithm for fault-tolerant topology reconfiguration in NoC architectures. ASP-DAC 2015: 48-53
    [c]  Yu Peng, Shouyi Yin, Leibo Liu, Shaojun Wei: Battery-aware mapping optimization of loop nests for CGRAs. ASP-DAC 2015: 767-772
    [c]  Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei: A 83fps 1080P resolution 354 mW silicon implementation for computing the improved robust feature in affine space. CICC 2015: 1-4
    [c]  Junbin Wang, Leibo Liu, Jianfeng Zhu, Shouyi Yin, Shaojun Wei: Acceleration of control flows on reconfigurable architecture with a composite method. DAC 2015: 45:1-45:6
    [c]  Guangli Jiang, Leibo Liu, Wenping Zhu, Shouyi Yin, Shaojun Wei: A 127 fps in full hd accelerator based on optimized AKAZE with efficiency and effectiveness for image feature extraction. DAC 2015: 87:1-87:6
    [c]  Chenyue Meng, Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei: Efficient memory partitioning for parallel data access in multidimensional arrays. DAC 2015: 160:1-160:6
    [c]  Shouyi Yin, Dajiang Liu, Leibo Liu, Shaojun Wei, Yike Guo: Joint affine transformation and loop pipelining for mapping nested loop on CGRAs. DATE 2015: 115-120
    [c]  Shouyi Yin, Jiakun Li, Leibo Liu, Shaojun Wei, Yike Guo: Cooperatively managing dynamic writeback and insertion policies in a last-level DRAM cache. DATE 2015: 187-192
    [c]  Fengbin Tu, Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei: RNA: a reconfigurable architecture for hardware neural acceleration. DATE 2015: 695-700
    [c]  Chen Yang, Leibo Liu, Shouyi Yin, Shaojun Wei: Cost-Effective Memory Architecture to Achieve Flexible Configuration and Efficient Data Transmission for Coarse-Grained Reconfigurable Array (Abstract Only). FPGA 2015: 263
    [c]  Leibo Liu, Yingjie Victor Chen, Dong Wang, Min Zhu, Shouyi Yin, Shaojun Wei: A Mixed-Grained Reconfigurable Computing Platform for Multiple-Standard Video Decoding (Abstract Only). FPGA 2015: 267
    [c]  Junbin Wang, Leibo Liu, Jianfeng Zhu, Shouyi Yin, Shaojun Wei: A Novel Composite Method to Accelerate Control Flow on Reconfigurable Architecture (Abstract Only). FPGA 2015: 270
    [c]  Shouyi Yin, Pengcheng Zhou, Leibo Liu, Shaojun Wei: Acceleration of Nested Conditionals on CGRAs via Trigger Scheme. ICCAD 2015: 597-604
    [c]  Hao Dong, Shouyi Yin, Guangli Jiang, Leibo Liu, Shaojun Wei: An automatic depth map generation method by image classification. ICCE 2015: 168-169
    [c]  Zhen Zhang, Shouyi Yin, Leibo Liu, Shaojun Wei: Real-time time-consistent 2D-to-3D video conversion based on color histogram. ICCE 2015: 188-189
    [c]  Tao Tan, Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei: Efficient lane detection system based on monocular camera. ICCE 2015: 202-203
    [c]  Fengbin Tu, Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei: Neural approximating architecture targeting multiple application domains. ISCAS 2015: 2509-2512
    [c]  Xu Dai, Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei: A Multi-modal 2D + 3D Face Recognition Method with a Novel Local Feature Descriptor. WACV 2015: 657-662

  • 2014

    [j]   Shanshan Cai, Leibo Liu, Shouyi Yin, Renyan Zhou, Weilong Zhang, Shaojun Wei: Optimization of speeded-up robust feature algorithm for hardware implementation. SCIENCE CHINA Information Sciences 57(4): 1-15 (2014)
    [j]   Leibo Liu, Yingjie Victor Chen, Dong Wang, Shouyi Yin, Xing Wang, Long Wang, Hao Lei, Peng Cao, Shaojun Wei: Implementation of multi-standard video decoder on a heterogeneous coarse-grained reconfigurable processor. SCIENCE CHINA Information Sciences 57(8): 1-14 (2014)
    [j]   Leibo Liu, Yingjie Victor Chen, Shouyi Yin, Li Zhou, Hang Yuan, Shaojun Wei: Implementation of AVS Jizhun decoder with HW/SW partitioning on a coarse-grained reconfigurable multimedia system. SCIENCE CHINA Information Sciences 57(8): 1-14 (2014)
    [j]   Leibo Liu, Yansheng Wang, Shouyi Yin, Min Zhu, Xing Wang, Shaojun Wei: Row-based configuration mechanism for a 2-D processing element array in coarse-grained reconfigurable architecture. SCIENCE CHINA Information Sciences 57(10): 1-18 (2014)
    [j]   Shouyi Yin, Shengjia Shao, Leibo Liu, Shaojun Wei: MapReduce inspired loop mapping for coarse-grained reconfigurable architecture. SCIENCE CHINA Information Sciences 57(12): 1-14 (2014)
    [j]   Ruoyu Xu, Wai Chiu Ng, George Jie Yuan, Shouyi Yin, Shaojun Wei: A 1/2.5 inch VGA 400 fps CMOS Image Sensor With High Sensitivity for Machine Vision. J. Solid-State Circuits 49(10): 2342-2351 (2014)
    [j]   Shouyi Yin, Xu Dai, Peng Ouyang, Leibo Liu, Shaojun Wei: A Multi-Modal Face Recognition Method Using Complete Local Derivative Patterns and Depth Maps. Sensors 14(10): 19561-19581 (2014)
    [j]   Leibo Liu, Wenping Zhu, Shouyi Yin, Eugene Tang, Paul Peng: An uneven-dual-core processor based mobile platform for facilitating the collaboration among various embedded electronic devices. IEEE Trans. Consumer Electronics 60(1): 137-145 (2014)
    [j]   Yansheng Wang, Leibo Liu, Shouyi Yin, Min Zhu, Peng Cao, Jun Yang, Shaojun Wei: On-Chip Memory Hierarchy in One Coarse-Grained Reconfigurable Architecture to Compress Memory Space and to Reduce Reconfiguration Time and Data-Reference Time. IEEE Trans. VLSI Syst. 22(5): 983-994 (2014)
    [j]   Leibo Liu, Dong Wang, Shouyi Yin, Yingjie Victor Chen, Min Zhu, Shaojun Wei: SimRPU: A Simulation Environment for Reconfigurable Architecture Exploration. IEEE Trans. VLSI Syst. 22(12): 2635-2648 (2014)
    [c]  Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei: Extending lifetime of battery-powered coarse-grained reconfigurable computing platforms. DATE 2014: 1-6
    [c]  Dajiang Liu, Shouyi Yin, Leibo Liu, Shaojun Wei: Exploiting Outer Loop Parallelism of Nested Loop on Coarse-Grained Reconfigurable Architectures. FCCM 2014: 32
    [c]  Chenchen Deng, Leibo Liu, Zhaoshi Li, Shouyi Yin, Shaojun Wei: Teach Reconfigurable Computing using mixed-grained fabrics based hardware infrastructure. FIE 2014: 1-9
    [c]  Chen Yang, Leibo Liu, Yansheng Wang, Shouyi Yin, Peng Cao, Shaojun Wei: Configuration approaches to improve computing efficiency of coarse-grained reconfigurable multimedia processor. FPL 2014: 1-4
    [c]  Peng Ouyang, Shouyi Yin, Leibo Liu, Shaojun Wei: A FAST Extreme Illumination Robust Feature in Affine Space. ICPR 2014: 2365-2370
    [7]  Shengjia Shao, Shouyi Yin, Leibo Liu, Shaojun Wei: Map-reduce inspired loop parallelization on CGRA. ISCAS 2014: 1231-1234
    [c]  Yuchi Zhang, Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei: A parallel hardware architecture for fast integral image computing. ISCAS 2014: 2189-2192
    [c]  Wenping Zhu, Leibo Liu, Shouyi Yin, Yuan Dong, Shaojun Wei, Eugene Y. Tang, Jiqiang Song, Jinzhan Peng: A 65 nm uneven-dual-core SoC based platform for multi-device collaborative computing. ISCAS 2014: 2527-2530
    [c]  Shouyi Yin, Peng Ouyang, Leibo Liu, Shaojun Wei: A fast and robust traffic sign recognition method using ring of RIBP histograms based feature. ROBIO 2014: 2570-2575